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  ltc6900 1 6900fa typical application description low power, 1khz to 20mhz resistor set sot-23 oscillator the ltc ? 6900 is a precision, low power oscillator that is easy to use and occupies very little pc board space. the oscillator frequency is programmed by a single external resistor (r set ). the ltc6900 has been designed for high accuracy operation (1.5% frequency error) without the need for external trim components. the ltc6900 operates with a single 2.7v to 5.5v power supply and provides a rail-to-rail, 50% duty cycle square wave output. the cmos output driver ensures fast rise/fall times and rail-to-rail switching. the frequency-setting resistor can vary from 10k to 2m to select a master oscillator frequency between 100khz and 20mhz (5v supply). the three-state div input determines whether the master clock is divided by 1, 10 or 100 before driving the output, providing three frequency ranges spanning 1khz to 20mhz (5v supply). the ltc6900 features a proprietary feedback loop that linearizes the relationship between r set and frequency, eliminating the need for tables to calculate frequency. the oscillator can be easily programmed using the simple formula outlined below: f osc = 10mhz ? 20k n ? r set ? ? ? ? ? ? ,n = 100, 10, 1, ? ? ? ? ? div pin = v + div pin = open div pin = gnd clock generator features applications n one external resistor sets the frequency n 1khz to 20mhz frequency range n 500a typical supply current, v s = 3v, 3mhz n frequency error 1.5% max, 5khz to 10mhz (t a = 25c) n frequency error 2% max, 5khz to 10mhz (t a = 0c to 70c) n 40ppm/c temperature stability n 0.04%/v supply stability n 50% 1% duty cycle 1khz to 2mhz n 50% 5% duty cycle 2mhz to 10mhz n fast start-up time: 50s to 1.5ms n 100 cmos output driver n operates from a single 2.7v to 5.5v supply n low pro? le (1mm) thinsot? package n portable and battery-powered equipment n pdas n cell phones n low cost precision oscillator n charge pump driver n switching power supply clock reference n clocking switched capacitor filters n fixed crystal oscillator replacement n ceramic oscillator replacement l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. thinsot is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. r set vs desired output frequency v + 1 2 3 5 1khz f osc 20mhz 5v 5v, n = 100 10k r set 2m 0.1f 6900 ta01a 4 gnd ltc6900 set out div open, n = 10 n = 1 f osc = 10mhz ? 20k n ? r set () desired output frequency (hz) 10 r set (k) 100 1k 100k 1m 10m 6900 ta01b 1 10k 10000 1000 100m 100 10 1
ltc6900 2 6900fa pin configuration absolute maximum ratings supply voltage (v + ) to gnd ......................... C 0.3v to 6v div to gnd .................................... C0.3v to (v + + 0.3v) set to gnd .................................... C 0.3v to (v + + 0.3v) operating temperature range (note 8) ltc6900c ............................................C 40c to 85c ltc6900i .............................................C40c to 85c storage temperature range .................. C65c to 150c lead temperature (soldering, 10 sec)................... 300c (note 1) top view s5 package 5-lead plastic tsot-23 1 2 3 v + gnd set 5 4 out div t jmax = 150c, ja = 256c/w order information lead free finish tape and reel part marking* package description temperature range ltc6900cs5#pbf ltc6900cs5#trpbf ltzm 5-lead plastic tsot-23 C40c to 85c ltc6900is5#pbf ltc6900is5#trpbf ltzm 5-lead plastic tsot-23 C40c to 85c consult ltc marketing for parts speci? ed with wider operating temperature ranges. *the temperature grade is identi? ed by a label on the shipping container. consult ltc marketing for information on non-standard lead based ? nish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/ electrical characteristics the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v + = 2.7v to 5.5v, r l = 5k, c l = 5pf, pin 4 = v + unless otherwise noted. all voltages are with respect to gnd. symbol parameter conditions min typ max units f frequency accuracy (notes 2, 3) v + = 5v 5khz f 10mhz 5khz f 10mhz, ltc6900c 5khz f 10mhz, ltc6900i 1khz f < 5khz 10mhz < f 20mhz 0.5 2 2 1.5 2.0 2.5 % % % % % v + = 3v 5khz f 10mhz 5khz f 10mhz, ltc6900c 5khz f 10mhz, ltc6900i 1khz f < 5khz 0.5 2 1.5 2.0 2.5 % % % % r set frequency-setting resistor range |f| < 1.5% v + = 5v v + = 3v 20 20 400 400 k k f/t frequency drift overtemperature (note 3) r set = 63.2k 0.004 %/c f/v frequency drift over supply (note 3) v + = 3v to 5v, r set = 63.2k 0.04 0.1 %/v timing jitter (note 4) pin 4 = v + , 20k r set 400k pin 4 = open, 20k r set 400k pin 4 = 0v, 20k r set 400k 0.1 0.2 0.6 % % % long-term stability of output frequency 300 ppm/ khr duty cycle (note 7) pin 4 = v + or open (div either by 100 or 10) pin 4 = 0v (div by 1), r set = 20k to 400k 49 45 50 50 51 55 % %
ltc6900 3 6900fa electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: frequencies near 100khz and 1mhz may be generated using two different values of r set (see the selecting the divider setting resistor paragraph in the applications information section). for these frequencies, the error is speci? ed under the following assumption: 20k < r set 200k. note 3: frequency accuracy is de? ned as the deviation from the f osc equation. note 4: jitter is the ratio of the peak-to-peak distribution of the period to the mean of the period. this speci? cation is based on characterization and is not 100% tested. also, see the peak-to-peak jitter vs output frequency curve in the typical performance characteristics section. the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v + = 2.7v to 5.5v, r l = 5k, c l = 5pf, pin 4 = v + unless otherwise noted. all voltages are with respect to gnd. symbol parameter conditions min typ max units v + operating supply range 2.7 5.5 v i s power supply current r set = 400k, pin 4 = v + , r l = v + = 5v f osc = 5khz v + = 3v 0.32 0.29 0.42 0.38 ma ma r set = 20k, pin 4 = 0v, r l = v + = 5v f osc = 10mhz v + = 3v 0.92 0.68 1.20 0.86 ma ma v ih high level div input voltage v + C 0.4 v v il low level div input voltage 0.5 v i div div input current (note 5) pin 4 = v + v + = 5v pin 4 = 0v v + = 5v C4 2 C2 4a a v oh high level output voltage (note 5) v + = 5v i oh = C 1ma i oh = C4ma 4.8 4.5 4.95 4.8 v v v + = 3v i oh = C 1ma i oh = C4ma 2.7 2.2 2.9 2.6 v v v ol low level output voltage (note 5) v + = 5v i ol = 1ma i ol = 4ma 0.05 0.2 0.15 0.4 v v v + = 3v i ol = 1ma i ol = 4ma 0.1 0.4 0.3 0.7 v v t r out rise time (note 6) v + = 5v pin 4 = v + or floating, r l = pin 4 = 0v, r l = 14 7 ns ns v + = 3v pin 4 = v + or floating, r l = pin 4 = 0v, r l = 19 11 ns ns t f out fall time (note 6) v + = 5v pin 4 = v + or floating, r l = pin 4 = 0v, r l = 13 6 ns ns v + = 3v pin 4 = v + or floating, r l = pin 4 = 0v, r l = 19 10 ns ns note 5: to conform with the logic ic standard convention, current out of a pin is arbitrarily given as a negative value. note 6: output rise and fall times are measured between the 10% and 90% power supply levels. these speci? cations are based on characterization. note 7: guaranteed by 5v test. note 8: the ltc6900c is guaranteed to meet speci? ed performance from 0c to 70c. the ltc6900c is designed, characterized and expected to meet speci? ed performance from C 40c to 85c but is not tested or qa sampled at these temperatures. the ltc6900i is guaranteed to meet speci? ed performance from C40c to 85c.
ltc6900 4 6900fa typical performance characteristics supply current vs output frequency output resistance vs supply voltage ltc6900 output operating at 20mhz, v s = 5v ltc6900 output operating at 10mhz, v s = 3v frequency variation vs r set frequency variation over temperature peak-to-peak jitter vs output frequency r set () 1k variation (%) 4 3 2 1 0 C1 C2 C3 C4 10k 100k 1m 6900 g01 typical low typical high t a = 25c guaranteed limits apply over 20k r set 400k temperature (c) C40 variation (%) 1.00 0.75 0.50 0.25 0 C0.25 C0.50 C0.75 C1.00 6900 g02 C20 0 20 40 60 80 typical low r set = 63.4k 1 or 10 or 100 typical high output frequency (hz) jitter (% p-p ) 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 6900 g03 1k 100k 1m 10k 10m 1, v a = 3v 1, v a = 5v 10 100 supply voltage (v) 2.5 3.0 40 output resistance () 80 140 3.5 4.5 5.0 6900 g05 60 120 100 4.0 5.5 6.0 output sinking current output sourcing current t a = 25c 12.5ns/div 0v 6900 g06 1v/div v + = 5v, r set = 10k, c l = 10pf 25ns/div 0v 6900 g07 1v/div v + = 3v, r set = 20k, c l = 10pf output frequency (hz) supply current (ma) 2.0 1.5 1.0 0.5 0 6900 g04 100, 3v 10, 3v 1, 3v 100, 5v 10, 5v 1, 5v t a = 25c c l = 5pf 0 1k 10k 100k 1m 10m
ltc6900 5 6900fa pin functions v + (pin 1): voltage supply (2.7v v + 5.5v). this supply must be kept free from noise and ripple. it should be by- passed directly to a ground plane with a 0.1f capacitor. gnd (pin 2): ground. should be tied to a ground plane for best performance. set (pin 3): frequency-setting resistor input. the value of the resistor connected between this pin and v + deter- mines the oscillator frequency. the voltage on this pin is held by the ltc6900 to approximately 1.1v below the v + voltage. for best performance, use a precision metal ? lm resistor with a value between 10k and 2m and limit the capacitance on this pin to less than 10pf. div (pin 4): divider-setting input. this three-state input selects among three divider settings, determining the value of n in the frequency equation. pin 4 should be tied to gnd for the 1 setting, the highest frequency range. floating pin 4 divides the master oscillator by 10. pin 4 should be tied to v + for the 100 setting, the lowest frequency range. to detect a ? oating div pin, the ltc6900 attempts to pull the pin toward midsupply. therefore, driving the div pin high requires sourcing approximately 2a. likewise, driv- ing div low requires sinking 2a. when pin 4 is ? oated, it should preferably be bypassed by a 1nf capacitor to ground or it should be surrounded by a ground shield to prevent excessive coupling from other pcb traces. out (pin 5): oscillator output. this pin can drive 5k and/ or 10pf loads. heavier loads may cause inaccuracies due to supply bounce at high frequencies. voltage transients, coupled into pin 5, above or below the ltc6900 power supplies will not cause latchup if the current into/out of the out pin is limited to 50ma. block diagram C + 1 3 gain = 1 v + v bias i res i res r set set gnd patent pending master oscillator programmable divider (n) (1, 10 or 100) v res = (v + C v set ) = 1.1v typically i res (v + C v set ) ? mo = 10mhz ? 20k ? three-state input detect gnd v + 2a 6900 bd 2a out divider select 5 div 4 2 + C + C
ltc6900 6 6900fa operation as shown in the block diagram, the ltc6900s master os- cillator is controlled by the ratio of the voltage between the v + and set pins and the current (i res ) is entering the set pin. the voltage on the set pin is forced to approximately 1.1v below v + by the pmos transistor and its gate bias voltage. this voltage is accurate to 8% at a particular input current and supply voltage (see figure 1). a resistor r set , connected between the v + and set pins, locks together the voltage (v + C v set ) and current, i res , variation. this provides the ltc6900s high precision. the master oscillation frequency reduces to: ? mo = 10mhz ? 20k r set ? ? ? ? ? ? the ltc6900 is optimized for use with resistors between 10k and 2m, corresponding to master oscillator frequen- cies between 100khz and 20mhz. to extend the output frequency range, the master oscillator signal may be divided by 1, 10 or 100 before driving out (pin 5). the divide-by value is determined by the state of the div input (pin 4). tie div to gnd or drive it below 0.5v to select 1. this is the highest frequency range, with the master output frequency passed directly to out. the div pin may be ? oated or driven to midsupply to select 10, the intermediate frequency range. the lowest frequency range, 100, is selected by tying div to v + or driving it to within 0.4v of v + . figure 2 shows the relationship between r set , divider setting and output frequency, including the overlapping frequency ranges near 100khz and 1mhz. the cmos output driver has an on resistance that is typi- cally less than 100. in the 1 (high frequency) mode, the rise and fall times are typically 7ns with a 5v supply and 11ns with a 3v supply. these times maintain a clean square wave at 10mhz (20mhz at 5v supply). in the 10 and 100 modes, where the output frequency is much lower, slew rate control circuitry in the output driver increases the rise/fall times to typically 14ns for a 5v supply and 19ns for a 3v supply. the reduced slew rate lowers emi (electromagnetic interference) and supply bounce. figure 1. v + C v set variation with i res figure 2. r set vs desired output frequency i res (a) 1 0.1 0.8 v res = v + C v set 1.2 1.3 1.4 10 100 1000 6900 f01 1.1 1.0 0.9 v + = 5v v + = 3v desired output frequency (hz) 10 r set (k) 100 1k 100k 1m 10m 6900 f02 1 10k 10000 1000 100m 100 10 1
ltc6900 7 6900fa applications information selecting the divider setting and resistor the ltc6900s master oscillator has a frequency range spanning 0.1mhz to 20mhz. however, accuracy may suffer if the master oscillator is operated at greater than 10mhz with a supply voltage lower than 4v. a programmable divider extends the frequency range to greater than three decades. table 1 describes the recommended frequencies for each divider setting. note that the ranges overlap; at some frequencies there are two divider/resistor combina- tions that result in the desired frequency. in general, any given oscillator frequency (f osc ) should be obtained using the lowest master oscillator frequency. lower master oscillator frequencies use less power and are more accurate. for instance, f osc = 100khz can be obtained by either r set = 20k, n = 100, master oscillator = 10mhz or r set = 200k, n = 10, master oscillator = 1mhz. the r set = 200k approach is preferred for lower power and better accuracy. table 1. frequency range vs divider setting divider setting frequency range 1 ? div (pin 4) = gnd > 500khz * 10 ? div (pin 4) = floating 50khz to 1mhz 100 ? div (pin 4) = v + < 100khz * at master oscillator frequencies greater than 10mhz (r set < 20k), the ltc6900 may experience reduced accuracy with a supply voltage less than 4v. after choosing the proper divider setting, determine the correct frequency-setting resistor. because of the linear correspondence between oscillation period and resistance, a simple equation relates resistance with frequency. r set = 20k ? 10mhz n?f osc ? ? ? ? ? ? , n = 100 10 1 ? ? ? ? ? (r setmin = 10k, r setmax = 2m) any resistor, r set , tolerance adds to the inaccuracy of the oscillator, f osc . alternative methods of setting the output frequency of the ltc6900 the oscillator may be programmed by any method that sources a current into the set pin (pin 3). the circuit in figure 3 sets the oscillator frequency using a programmable current source and in the expression for f osc , the resistor r set is replaced by the ratio of 1.1v/i control . as already explained in the operation section, the voltage difference between v + and set is approximately 1.1v, therefore, the figure 3 circuit is less accurate than if a resistor controls the oscillator frequency. figure 4 shows the ltc6900 con? gured as a vco. a voltage source is connected in series with an external 20k resis- tor. the output frequency, f osc , will vary with v control , that is the voltage source connected between v + and the set pin. again, this circuit decouples the relationship between the input current and the voltage between v + and set; the frequency accuracy will be degraded. the oscillator frequency, however, will monotonically increase with decreasing v control . figure 3. current controlled oscillator figure 4. voltage controlled oscillator v + 1 2 3 5 182khz to 18mhz (typically 8%) v + 0.1f i control 1a to 100a 6900 f03 4 gnd n = 1 ltc6900 set out div 10mhz n ? osc ??i control i control expressed in (a) 20k 1.1v v + 1 2 3 5 v + 0.1f r set 20k v control 0v to 1.1v 6900 f04 4 gnd n = 1 ltc6900 set out div + C 10mhz n ? osc ? ? 1 C v control 1.1v 20k r set () typical f osc accuracy 0.5%, v control = 0v 8%, v control = 0.5v
ltc6900 8 6900fa applications information power supply rejection low frequency supply rejection (voltage coef? cient) figure 5 shows the output frequency sensitivity to power supply voltage at several different temperatures. the ltc6900 has a guaranteed voltage coef? cient of 0.1%/v but, as figure 5 shows, the typical supply sensitivity is twice as low. high frequency power supply rejection the accuracy of the ltc6900 may be affected when its power supply generates signi? cant noise with a frequency content in the vicinity of the programmed value of f osc . if a switching power supply is used to power the ltc6900, and if the ripple of the power supply is more than 20mv, make sure the switching frequency and its harmonics are not related to the output frequency of the ltc6900. otherwise, the oscillator may show additional frequency error. if the ltc6900 is powered by a switching regulator and the switching frequency or its harmonics coincide with the output frequency of the ltc6900, the jitter of the oscillator output may be affected. this phenomenon will become noticeable if the switching regulator exhibits ripples beyond 30mv. start-up time the start-up time and settling time to within 1% of the ? nal value can be estimated by t start ? r set (3.7s/k) + 10s. note the start-up time depends on r set and it is independent from the setting of the divider pin. for in- stance with r set = 100k, the ltc6900 will settle with 1% of its 200khz ? nal value (n = 10) in approximately 380s. figure 6 shows start-up times for various r set resistors. figure 7 shows an application where a second set resistor r set2 is connected in parallel with set resistor r set1 via switch s1. when switch s1 is open, the output frequency of the ltc6900 depends on the value of the resistor r set1 . when switch s1 is closed, the output frequency of the ltc6900 depends on the value of the parallel combination of r set1 and r set2 . the start-up time and settling time of the ltc6900 with switch s1 open (or closed) is described by t start shown above. once the ltc6900 starts and settles, and switch s1 closes (or opens), the ltc6900 will settle to its new output frequency within approximately 70s. jitter the peak-to-peak jitter vs output frequency graph, in the typical performance characteristics section, shows the typical clock jitter as a function of oscillator frequency and power supply voltage. the capacitance from the set pin, (pin 3), to ground must be less than 10pf. if this require- ment is not met, the jitter will increase. figure 5. supply sensitivity figure 6. start-up time supply voltage (v) 2.5 C0.05 frequency deviation (%) 0 0.05 0.10 0.15 3.0 3.5 4.0 4.5 6900 f05 5.0 5.5 85c C40c 25c r set = 63.2k pin 4 = floating (10) time after power applied (s) 0 frequency error (%) 20 30 40 600 400k 1000 6900 f06 10 0 C10 200 400 800 50 60 70 63.2k 20k t a = 25c v + = 5v
ltc6900 9 6900fa applications information a ground referenced voltage controlled oscillator the ltc6900 output frequency can also be programmed by steering current in or out of the set pin, as conceptually shown in figure 8. this technique can degrade accuracy as the ratio of (v + C v set ) / i res is no longer uniquely dependent of the value of r set , as shown in the ltc6900 block diagram. this loss of accuracy will become noticeable when the magnitude of i prog is comparable to i res . the frequency variation of the ltc6900 is still monotonic. figure 9 shows how to implement the concept shown in figure 8 by connecting a second resistor, r in , between the set pin and a ground referenced voltage source, v in . for a given power supply voltage in figure 9, the output frequency of the ltc6900 is a function of v in , r in , r set and (v + C v set ) = v res : f osc = 10mhz n ? 20k r in r set ? 1 + v in ? v + () v res ? 1 1 + r in r set ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? (1) when v in = v + , the output frequency of the ltc6900 as- sumes the highest value and it is set by the parallel com- bination of r in and r set . also note, the output frequency, f osc , is independent of the value of v res = (v + C v set ) so the accuracy of f osc is within the data sheet limits. when v in is less than v + , and expecially when v in ap- proaches the ground potential, the oscillator frequency, f osc , assumes its lowest value and its accuracy is affected by the change of v res = (v + C v set ). at 25c v res varies by 8%, assuming the variation of v + is 5%. the tem- perature coef? cient of v res is 0.02%/c. by manipulating the algebraic relation for f osc above, a simple algorithm can be derived to set the values of external resistors r set and r in , as shown in figure 9. 1. choose the desired value of the maximum oscillator frequency, f osc(max) , occurring at maximum input voltage v in(max) v + . 2. set the desired value of the minimum oscillator fre- quency, f osc(min) , occurring at minimum input voltage v in(min) 0. 3. choose v res = 1.1 and calculate the ratio of r in /r set from the following: r in r set = v in(max) ? v + () ? f osc(max) f osc(min) ? ? ? ? ? ? v in(min) ? v + () v res f osc(max) () f osc(min) ? 1 ? ? ? ? ? ? ? ? ? 1 (2) figure 7 v + 1 2 r set1 r set2 3 s1 5 v + 6900 f07 4 gnd ltc6900 3v or 5v set out div 10 100 1 f osc = 10mhz ? or () 20k n ? r set1 f osc = 10mhz ? () 20k n ? r set1 //r set2 figure 8. concept for programming via current steering figure 9. implementation of concept shown in figure 8 v + 1 2 r set i pr 3 5 5v v + 6900 f08 4 gnd ltc6900 0.1f open set out div 10 100 1 i res v + 1 2 r set v res r in v in 3 5 5v v + 6900 f09 4 gnd ltc6900 0.1f f osc open set out div 10 100 1 + C + C
ltc6900 10 6900fa applications information once r in /r set is known, calculate r set from: r set = 10mhz n ? 20k f osc(max) ? v in(max) ? v + () + v res 1 + r in r set ? ? ? ? ? ? v res r in r set ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? (3) example 1: in this example, the oscillator output frequency has small excursions. this is useful where the frequency of a system should be tuned around some nominal value. let v + = 3v, f osc(max) = 2mhz for v in(max) = 3v and f osc(min) = 1.5mhz for v in = 0v. solve for r in /r set by equation (2), yielding r in /r set = 9.9/1. r set = 110.1k by equation (4). r in = 9.9r set = 1.089m. for standard resis- tor values, use r set = 110k (1%) and r in = 1.1m (1%). figure 10 shows the measured f osc vs v in . the 1.5mhz to 2mhz frequency excursion is quite limited, so the curve of f osc vs v in is linear. example 2: vary the oscillator frequency by one octave per volt. as- sume f osc(min) = 1mhz and f osc(max) = 2mhz, when the input voltage varies by 1v. the minimum input voltage is half supply, that is v in(min) = 1.5v, v in(max) = 2.5v and v + = 3v. equation (2) yields r in /r set = 1.273 and equation (3) yields r set = 142.8k. r in = 1.273r set = 181.8k. for standard resistor values, use r set = 143k (1%) and r in = 182k (1%). figure 11 shows the measured f osc vs v in . for v in higher than 1.5v, the vco is quite linear; nonlinearities occur when v in becomes smaller than 1v, although the vco remains monotonic. maximum vco modulation bandwidth the maximum vco modulation bandwidth is 25khz; that is, the ltc6900 will respond to changes in v in at a rate up to 25khz. in lower frequency applications however, the modulation frequency may need to be limited to a lower rate to prevent an increase in output jitter. this lower limit is the master oscillator frequency divided by 20, (f osc /20). in general, for minimum output jitter the modulation fre- quency should be limited to f osc /20 or 25khz, whichever is less. for best performance at all frequencies, the value for f osc should be the master oscillator frequency (n = 1) when v in is at the lowest level. figure 10. output frequency vs input voltage figure 11. output frequency vs input voltage v in (v) 0 0.5 1 1.5 2 2.5 3 f osc (mhz) 6900 f10 2.00 1.95 1.90 1.85 1.80 1.75 1.70 1.65 1.60 1.55 1.50 r in = 1.1m r set = 110k v + = 3v n = 1 v in (v) 0 0.5 1 1.5 2 2.5 3 f osc (khz) 6900 f11 3000 2500 2000 1500 1000 500 0 r in = 182k r set = 143k v + = 3v n = 1
ltc6900 11 6900fa information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description s5 package 5-lead plastic tsot-23 (reference ltc dwg # 05-08-1635) 1.50 ? 1.75 (note 4) 2.80 bsc 0.30 ? 0.45 typ 5 plcs (note 3) datum ?a? 0.09 ? 0.20 (note 3) s5 tsot-23 0302 rev b pin one 2.90 bsc (note 4) 0.95 bsc 1.90 bsc 0.80 ? 0.90 1.00 max 0.01 ? 0.10 0.20 bsc 0.30 ? 0.50 ref note: 1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 max 0.62 max 0.95 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref applications information example 3: v + = 3v, f osc(max) = 5mhz, f osc(min) = 4mhz, n = 1 v in(max) = 2.5v, v in(min) = 0.5v r in/ r set = 8.5, r set = 43.2k, r in = 365k maximum modulation bandwidth is the lesser of 25khz or f osc(min) /20 (4mhz/20 = 200khz) maximum v in modulation frequency = 25khz example 4: v + = 3v, f osc(max) = 400khz, f osc(min) = 200khz, n = 10 v in(max) = 2.5v, v in(min) = 0.5v r in/ r set = 3.1, r set = 59k, r in = 182k maximum modulation bandwidth is the lesser of 25khz or f osc(min) /20 calculated at n =1 (2mhz/20 = 100khz) maximum v in modulation frequency = 25khz table 2. variation of v res for various values of r in || r set r in || r set (v in = v + )v res , v + = 3v v res , v + = 5v 20k 0.98v 1.03v 40k 1.03v 1.08v 80k 1.07v 1.12v 160k 1.1v 1.15v 320k 1.12v 1.17v v res = voltage across r set note: all of the calculations above assume v res = 1.1v, although v res 1.1v. for completeness, table 2 shows the variation of vres against various parallel combinations of r in and r set (v in = v + ). calulate ? rst with v res 1.1v, then use table 2 to get a better approximation of v res , then recalculate the resistor values using the new value for v res .
ltc6900 12 6900fa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2002 lt 0709 rev a ? printed in usa related parts typical application part number description comments ltc1799 1khz to 30mhz thinsot oscillator identical pinout, higher frequency operation temperature-to-frequency converter output frequency vs temperature v + 1 2 3 5 f osc = ? 10mhz 10 5v r t 100k thermistor c1 0.1f 6900 ta02 4 r t : ysi 44011 800 765-4974 gnd ltc6900 set out div 20k r t 6900 ta03 1400 1200 1000 800 600 400 200 0 C20C100 102030405060708090 temperature (c) frequency (khz) max typ min


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